Neologic
Novel chip architecture that reduces the power consumption of micro-processors by up to 30% at any technology node.
The problem
The rapid build-out of computing infrastructure is driving an explosion in power demand, already consuming 2.5% of the world's energy and projected to reach 7% by 2030. At the same time, developing next-generation processors is becoming exponentially harder and more costly: as chips grow more compact, the gains long promised by Moore's law are getting harder to sustain.
The solution
NeoLogic has developed a novel chip architecture that augments traditional designs, exploiting their redundancies by compressing circuits and optimising the routing between transistors. The result is a 10 to 25% improvement in power efficiency while using 10% less chip area than the top industry benchmarks, giving telecoms, automotive, and IoT manufacturers more performance per watt and a smaller energy footprint across their devices.
